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Power Amplifier Selection: Efficiency, Linearity, and Thermal Reality

The PA is where your transmitter design meets thermodynamics. Every percentage point of efficiency you leave on the table becomes heat — and heat is the constraint that ultimately limits your design.

The power amplifier is the last active stage before the antenna. It consumes most of the transmitter's DC power, generates most of its heat, and dominates the linearity, efficiency, and spectral compliance of the entire system. PA selection is rarely a simple datasheet exercise.

The fundamental trade-off triangle

Every PA design navigates three competing requirements:

Output power. The PA must deliver enough RF power to close the link budget. This ranges from +10 dBm (10 mW) for short-range IoT to +46 dBm (40 W) for macro base stations. The required output power is non-negotiable — it's set by the communication standard, link distance, and antenna gain.

Efficiency. Power-added efficiency (PAE) measures what fraction of DC input power becomes RF output power. A PA delivering +30 dBm (1 W) at 25% PAE consumes 4 W of DC power and dissipates 3 W as heat. At 50% PAE, it consumes 2 W and dissipates 1 W. That 3x reduction in heat dissipation directly affects battery life, thermal design complexity, and reliability.

Linearity. Modern modulation schemes (OFDM, 256-QAM) have high peak-to-average power ratio (PAPR) — 8-12 dB for 5G NR. The PA must reproduce these peaks faithfully without clipping. But PA efficiency peaks at or near saturation — exactly where linearity is worst. Operating the PA with 8 dB of back-off from saturation to preserve linearity cuts efficiency roughly in half.

You can optimize for any two of these three. Getting all three requires advanced techniques like digital pre-distortion, envelope tracking, or Doherty architecture.

PA classes and their trade-offs

Class A. The transistor conducts for the full signal cycle (360 degrees). Maximum linearity — distortion products can be 40-50 dB below the carrier. But theoretical maximum efficiency is only 50%, and practical Class A PAs achieve 25-35%. Used in instrumentation and test equipment where linearity is paramount and efficiency is secondary.

Class AB. The transistor conducts for 180-360 degrees. The standard choice for linear communication transmitters. Efficiency of 35-50% near saturation, dropping to 10-20% at 6-8 dB back-off. The linearity is good enough for most modulated signals with moderate PAPR, and can be improved further with digital pre-distortion (DPD).

Class B. Conduction angle of exactly 180 degrees. Theoretical maximum efficiency of 78.5%. In practice, difficult to implement without crossover distortion at low signal levels. Rarely used in pure form — Class AB with bias near the Class B point is more common.

Class C. Conduction angle below 180 degrees. Efficiency above 60% is achievable, but severe nonlinearity makes it unsuitable for amplitude-modulated signals. Used in FM transmitters, radar, and as efficiency-boosted peaking stages in Doherty architectures.

Class E/F (switching modes). The transistor operates as a switch rather than a linear amplifier. Theoretical efficiency of 100% (Class E) or near 100% (Class F, Class F inverse). In practice, 70-85% efficiency at GHz frequencies. Suitable for constant-envelope modulations (FSK, GMSK) or as building blocks in outphasing and polar transmitter architectures. GaN HEMT devices have made switching-mode PAs practical up to 6 GHz.

Doherty architecture. Combines a main (Class AB) amplifier with a peaking (Class C) amplifier. At low signal levels, only the main amplifier is active, biased for good linearity. At peaks, the peaking amplifier engages, boosting both power and efficiency. Achieves 40-50% efficiency at 6-8 dB back-off — roughly double the efficiency of standalone Class AB at the same back-off. The de facto standard for 4G/5G base station PAs.

Technology: GaN vs. GaAs vs. LDMOS vs. SiGe

GaN HEMT. The dominant technology for PAs above +30 dBm and above 3 GHz. High breakdown voltage (28-48 V supply) enables high power density — 5-10 W/mm of gate periphery. Excellent for wideband designs because the higher impedance (compared to LDMOS) makes matching easier. PAE of 40-65% depending on frequency and architecture. GaN on SiC substrates provides excellent thermal conductivity. Cost has decreased significantly but remains 2-3x GaAs for comparable output power.

GaAs HBT/pHEMT. The workhorse for handset and small-cell PAs below +33 dBm, operating from 1-6 GHz. Lower supply voltage (3.3-5 V), good linearity, well-established packaging. PAE of 35-55% for handset PAs with envelope tracking. Mature supply chain with multiple sources. Limited above +33 dBm due to breakdown voltage constraints.

LDMOS (Laterally Diffused Metal Oxide Semiconductor). Silicon-based technology dominant in cellular base station PAs below 4 GHz. High power capability (up to hundreds of watts per device). 28-50 V supply. Lower cost per watt than GaN at high power levels. But performance degrades significantly above 4 GHz, and the lower power density compared to GaN means larger die sizes and packages.

SiGe BiCMOS. Used in fully integrated transmitter ICs below 6 GHz, particularly for WiFi and Bluetooth. Limited output power (typically below +20 dBm). Lowest cost when integrated with the rest of the transmitter chain. Performance is adequate for short-range, moderate-power applications.

Thermal reality

PA thermal management is not an afterthought — it's a design constraint that affects component selection, PCB stackup, and mechanical enclosure design.

Junction temperature. Every PA device has a maximum junction temperature — typically 150-200C for GaN, 150-175C for GaAs. The thermal path from junction to ambient includes the die attach, package, solder joint, PCB thermal vias, and ultimately the enclosure or heatsink. Each interface adds thermal resistance.

Thermal resistance (Rth). Specified in C/W from junction to case (flange, exposed pad, or package bottom). A PA with Rth,jc = 5 C/W dissipating 3 W has a junction temperature 15C above the case temperature. If the case is at 85C (a reasonable worst-case board temperature), the junction reaches 100C — well within limits for GaN. For a GaAs device with a 150C maximum, this leaves only 50C of margin for ambient temperature rise.

PCB thermal design. High-power PAs require an array of thermal vias under the exposed pad — typically 0.3 mm diameter vias on 0.6-1.0 mm pitch, filled or plugged. The thermal vias connect the exposed pad to internal copper planes and the bottom copper layer, spreading the heat laterally. Without adequate thermal vias, the junction temperature can exceed limits even when the package specification suggests adequate margin.

Derating. Most PA datasheets specify performance at 25C. At 85C ambient, the maximum output power, efficiency, and reliability all derate. A PA rated at +30 dBm at 25C might safely deliver only +28 dBm at 85C. This derating must be included in the link budget — designing to the 25C spec and discovering the shortfall during temperature testing is a common and expensive mistake.

Digital pre-distortion (DPD) compatibility

Modern cellular transmitters rely on DPD to linearize the PA. DPD works by intentionally distorting the input signal in a way that cancels the PA's distortion, improving ACLR by 15-25 dB without sacrificing efficiency.

Not every PA works well with DPD. Requirements for DPD compatibility include:

  • Memoryless or weakly memory-affected behavior. PAs with strong memory effects (where the output depends on not just the current input but also recent past inputs) are harder to linearize with DPD. Thermal memory (slow) and electrical memory (fast) both contribute.
  • Sufficient gain. DPD requires some headroom above the average operating point to reproduce signal peaks.
  • Monotonic AM/AM characteristic. The gain compression curve should be smooth and monotonic. PAs with gain expansion followed by compression create inflection points that complicate DPD modeling.

PA datasheets don't always specify DPD compatibility explicitly. Working with the vendor's application engineering team and testing with representative waveforms is often necessary.

Selection checklist

  1. Output power at the required frequency (derated to max operating temperature)
  2. PAE at the operating back-off level (not at saturation)
  3. Linearity: P1dB, OIP3, ACLR with the target waveform
  4. Supply voltage compatibility with available power rails
  5. Thermal impedance and required PCB thermal management
  6. Package type and footprint compatibility with the layout
  7. DPD compatibility if applicable
  8. Availability, second sources, lifecycle status

What's been your experience with GaN adoption? The technology has matured significantly, but I still see teams defaulting to GaAs for everything below +30 dBm. Is the cost premium the main barrier, or is it design familiarity?

This is Part 6 of an 8-part series on RF transmitter design. Previously: "Driver Amplifiers." Next: "Link Budget Analysis: Making the Numbers Close."